Fr0zkaandClaude Opus 5.5 a6185b1a3f wip(L15, side branch): extended far gate + rejected far-mesh candidates (null result) ...

Refine x2 at LOD4-8 saves 13.6% but breaks the 1 px rule, shading and swaps, and opens holes;
station x2 and ray removal open connector gaps. Not for assembler/world. See Linux15/REPORT.md.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01CSFYgsdW8ejZSyiMf4qRSX

2026-10-20 03:29:13 +02:00

..

DesignD2

design: world assembler -- Luna D2 + Claude response

2026-10-08 23:24:25 +02:00

OwnerShapeWorld

wip(assembler): round S8 -- region rebuilds no longer stall admission; result backlog capped

2026-10-19 09:43:03 +02:00

VoxelSpeedRound

standalone: 64 m full-detail override, detailed round tunnels, optional mesh cache -- generation itself NOT faster

2026-10-03 08:59:46 +02:00

WorldAssemblerM1

wip(assembler): M1 round 4 -- cap rebuilt (no hiding), sub-voxel audit, routes + mesh-free queries

2026-10-09 14:23:38 +02:00

WorldAssemblerM2

wip(assembler): M2 round 4 -- WorldAssemblerHybridV2: exact contacts, tagged tiles 1.18-1.27x MC

2026-10-10 10:41:43 +02:00

WorldAssemblerM3

wip(L15, side branch): extended far gate + rejected far-mesh candidates (null result)

2026-10-20 03:29:13 +02:00